From 0cb345ed5ccbe786d0a7e7e2de740c0a07b82770 Mon Sep 17 00:00:00 2001 From: ozpv <39195175+ozpv@users.noreply.github.com> Date: Wed, 19 Aug 2026 21:34:09 -0500 Subject: sdram and ringmod effect --- Core/Inc/Effects/ringmod.h | 16 ++++++++++++++++ Core/Inc/cs4272.h | 12 +++++++++--- Core/Inc/w9825g6kh6.h | 17 +++++++++++++++++ 3 files changed, 42 insertions(+), 3 deletions(-) create mode 100755 Core/Inc/Effects/ringmod.h create mode 100755 Core/Inc/w9825g6kh6.h (limited to 'Core/Inc') diff --git a/Core/Inc/Effects/ringmod.h b/Core/Inc/Effects/ringmod.h new file mode 100755 index 0000000..42cb229 --- /dev/null +++ b/Core/Inc/Effects/ringmod.h @@ -0,0 +1,16 @@ +/* + * ringmod.h + * + * Created on: Aug 19, 2026 + * Author: ozpv + */ + +#ifndef INC_EFFECTS_RINGMOD_H_ +#define INC_EFFECTS_RINGMOD_H_ + +#include +#include + +void ringmod(float *samples, size_t range_min, size_t range_max); + +#endif /* INC_EFFECTS_RINGMOD_H_ */ diff --git a/Core/Inc/cs4272.h b/Core/Inc/cs4272.h index 30e493a..423b7c0 100755 --- a/Core/Inc/cs4272.h +++ b/Core/Inc/cs4272.h @@ -8,7 +8,9 @@ #ifndef INC_CS4272_H_ #define INC_CS4272_H_ -// cs4272k-czzr 7. REGISTER QUICK REFERENCE +#include + +/* cs4272k-czzr 7. REGISTER QUICK REFERENCE */ #define MODE_CONTROL_1 0x01 #define DAC_CONTROL 0x02 #define DAC_VOLUME_AND_MIXING_CONTROL 0x03 @@ -20,16 +22,20 @@ #define CS4272_CHIP_ID 0x0 -// set by ncs/ad0 pin +/* set by ad0 ncs pin */ #define CS4272_I2C_ADDR (0b0010000 << 1) +#define SAMPLE_RATE 48000 #define BUFFER_SIZE 512 extern volatile int32_t rx_buffer[BUFFER_SIZE]; extern volatile int32_t tx_buffer[BUFFER_SIZE]; +extern volatile float samples[BUFFER_SIZE]; extern const uint8_t CS4272_CONFIG[7]; -uint8_t CS4272_Init(); +uint8_t CS4272_Init(void); + +#define INT24_MAX 0x7FFFFF #endif /* INC_CS4272_H_ */ diff --git a/Core/Inc/w9825g6kh6.h b/Core/Inc/w9825g6kh6.h new file mode 100755 index 0000000..3e4f043 --- /dev/null +++ b/Core/Inc/w9825g6kh6.h @@ -0,0 +1,17 @@ +/* + * w9825g6kh6.h + * + * Created on: Aug 18, 2026 + * Author: ozpv + */ + +#ifndef INC_W9825G6KH6_H_ +#define INC_W9825G6KH6_H_ + +#define SDRAM_BASE 0xC0000000 +#define SDRAM_SIZE 0x02000000 + +void FMC_Init(void); +void SDRAM_Test(void); + +#endif /* INC_W9825G6KH6_H_ */ -- cgit v1.2.3