From 0cb345ed5ccbe786d0a7e7e2de740c0a07b82770 Mon Sep 17 00:00:00 2001
From: ozpv <39195175+ozpv@users.noreply.github.com>
Date: Wed, 19 Aug 2026 21:34:09 -0500
Subject: sdram and ringmod effect

---
 Core/Src/main.c | 21 ++++++++++++++-------
 1 file changed, 14 insertions(+), 7 deletions(-)

(limited to 'Core/Src/main.c')

diff --git a/Core/Src/main.c b/Core/Src/main.c
index 574bba8..9c58861 100755
--- a/Core/Src/main.c
+++ b/Core/Src/main.c
@@ -29,6 +29,7 @@
 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
 #include "cs4272.h"
+#include "w9825g6kh6.h"
 /* USER CODE END Includes */
 
 /* Private typedef -----------------------------------------------------------*/
@@ -74,7 +75,7 @@ int main(void)
 
   /* USER CODE BEGIN 1 */
 
-  // disabled by the boot loader
+  /* disabled by the boot loader */
   __enable_irq();
 
   /* USER CODE END 1 */
@@ -119,6 +120,9 @@ int main(void)
   //MX_QUADSPI_Init();
   /* USER CODE BEGIN 2 */
 
+  FMC_Init();
+  SDRAM_Test();
+
   __HAL_RCC_SAI1_CLK_ENABLE();
   __HAL_SAI_ENABLE(&hsai_BlockA1);
 
@@ -207,10 +211,8 @@ void SystemClock_Config(void)
   }
 }
 
-/**
-  * @brief Peripherals Common Clock Configuration
-  * @retval None
-  */
+/* USER CODE BEGIN 4 */
+
 void PeriphCommonClock_Config(void)
 {
   RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
@@ -233,8 +235,6 @@ void PeriphCommonClock_Config(void)
   }
 }
 
-/* USER CODE BEGIN 4 */
-
 /* USER CODE END 4 */
 
  /* MPU Configuration */
@@ -287,6 +287,13 @@ void Error_Handler(void)
   /* User can add his own implementation to report the HAL error return state */
   while (1)
   {
+      HAL_GPIO_WritePin(GPIOC, GPIO_PIN_12, GPIO_PIN_SET);
+
+      HAL_Delay(500);
+
+      HAL_GPIO_WritePin(GPIOC, GPIO_PIN_12, GPIO_PIN_RESET);
+
+      HAL_Delay(500);
   }
   /* USER CODE END Error_Handler_Debug */
 }
-- 
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