diff options
| author | ozpv <39195175+ozpv@users.noreply.github.com> | 2026-08-19 21:34:09 -0500 |
|---|---|---|
| committer | ozpv <39195175+ozpv@users.noreply.github.com> | 2026-08-19 21:34:09 -0500 |
| commit | 0cb345ed5ccbe786d0a7e7e2de740c0a07b82770 (patch) | |
| tree | 89682cd81419b138c5657cfa2dae797c81f8ea33 /Core/Src/fmc.c | |
| parent | 0c79f390c81f56fd087c2fffb07b373594119668 (diff) | |
sdram and ringmod effect
Diffstat (limited to 'Core/Src/fmc.c')
| -rwxr-xr-x | Core/Src/fmc.c | 26 |
1 files changed, 8 insertions, 18 deletions
diff --git a/Core/Src/fmc.c b/Core/Src/fmc.c index ae14948..b1eac4d 100755 --- a/Core/Src/fmc.c +++ b/Core/Src/fmc.c @@ -53,15 +53,15 @@ void MX_FMC_Init(void) hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2;
hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_ENABLE;
- hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_0;
+ hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_2;
/* SdramTiming */
- SdramTiming.LoadToActiveDelay = 16;
- SdramTiming.ExitSelfRefreshDelay = 12;
- SdramTiming.SelfRefreshTime = 16;
- SdramTiming.RowCycleDelay = 10;
- SdramTiming.WriteRecoveryTime = 16;
- SdramTiming.RPDelay = 3;
- SdramTiming.RCDDelay = 3;
+ SdramTiming.LoadToActiveDelay = 2;
+ SdramTiming.ExitSelfRefreshDelay = 8;
+ SdramTiming.SelfRefreshTime = 5;
+ SdramTiming.RowCycleDelay = 6;
+ SdramTiming.WriteRecoveryTime = 3;
+ SdramTiming.RPDelay = 2;
+ SdramTiming.RCDDelay = 2;
if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK)
{
@@ -84,16 +84,6 @@ static void HAL_FMC_MspInit(void){ return;
}
FMC_Initialized = 1;
- RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
-
- /** Initializes the peripherals clock
- */
- PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_FMC;
- PeriphClkInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_PLL;
- if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
- {
- Error_Handler();
- }
/* Peripheral clock enable */
__HAL_RCC_FMC_CLK_ENABLE();
|
